Intro
This page contains detailed information on the Pinnacle PCTV Pro PCI v2.1 card.
links
manufacturers
crypto
board name
pinnacle systems pctv pro
"R0B2D 660852 2.1"
tuner module
data sheet found on this intel site
Programming is very simmilar to the philips FM1246 chip. since the philips documentation is much clearer I also took some specs
from that document, I have not tested to see if it really is that similar.
front end 4009 fr5 |AL.RF
temic 3x7 488 | 9945
-------+----+------+-----
AL.IF | FT | LCT | FM
B0 | J6 | O3 | E3
- FE09 i2c bus scl
- FE10 i2c bus sda
- FE11 i2c address selection : open = 0xC2 (selects c0 - c7)
- FE12 -
- FE13 -
- FE14 -
- FE15 -
- FE16 fm sound output R
- FE17 fm sound output L
- FE18 2nd If
- FE19 Video output
- FE20 +5V
- FE21 af sound output/fm mpx
datapacket:
- C2 - address (writemode)
- dividerhigh (bit15=0)
- dividerlow
- 0x80 + (chargepumpflag:1)<<6 + (testmode:3)<<3 + (stepsize:2)<<1 + OS:1
- bandselect
Actually these can be swapped, the divider is recognized by its '0' bit15,
the control word is recognized by its '1' bit15.
field | default | description |
divider | - | 15 bits
TV: freq + 38.9 Mhz = divider * stepsize
RADIO: freq + 10.7 Mhz = divider * stepsize |
chargepump | 1 | 1=fast tuning, 0=high quality |
testmode | 1 | the docs tell me this is the only valid value |
stepsize | 0 |
0 | 50000 Hz |
1 | 31250 Hz |
2 | 50000 Hz |
3 | 62500 Hz |
50kHz is recommended for fm-radio, the other stepsizes
are recommended for tv
|
OS | 0 | 0=normal, 1=chargepump in high impedance state(?) |
bandselect | - |
value | band | frequency range |
0xa0 | vhf-low, | 55.25Mhz - 157.25Mhz |
0x90 | vhf-high, | 163.25Mhz - 451.25Mhz |
0x30 | UHF, | 457.25Mhz - 801.25Mhz |
0xa0 + (mute:1)<<3 + 0x04 + (mono:1)<<2 + (afc_fm:1) | fm radio | 75.9 Mhz - 108.1 Mhz |
in tv-mode, bit0=1 means 'power down'
|
mute | - | |
mono | - | |
afc | - | 0 : signal strength in output
1 : afc status in output
|
recommended: vhf-low < 158Mhz < vhf-high < 453Mhz < uhf
readdatapacket:
- C3 - address
- (POR:1)<<7 + (lockflag:1)<<6 + (iostatus:3)<<3 + (afc:3)
field | description |
POR | POR=1 at power on |
lockflag | 1=PLL locked |
iostatus | of port0-2 |
afc | afc status
0 | -125 kHz |
1 | -62.5 kHz |
2 | 0 kHz |
3 | +62.5 kHz |
4 | +125 kHz |
|
sound processor
Datasheets found on micronas site
U1:
micronas
msp 3451G A2
0231 D8 LC F
086213006
i2c subaddresses of msp34xx (see page 18 of doc)
Demodulator addresses
| address | r/w | description |
DEM | 0x0001 | write | [compat] FIR1 filter coefficients channel 1 |
DEM | 0x0005 | write | [compat] FIR2 filter coefficients channel 2 |
DEM | 0x001f | write | [compat] PLL_CAPS |
DEM | 0x0020 | write | standard select |
DEM | 0x0021 | write | [compat] auto fm/am |
DEM | 0x0022 | write | [compat] stereo id threshold |
DEM | 0x0023 | read | [compat] NCAM sync bit |
DEM | 0x0024 | write | [compat] carrier mute threshold |
DEM | 0x0030 | write | modus |
DEM | 0x0038 | read | [compat] nicam bits 10:3 |
DEM | 0x003e | read | [compat] nicam cib1 + cib2 control bits |
DEM | 0x0056 | write | ? |
DEM | 0x0057 | read | [compat] nicam error rate |
DEM | 0x007e | read | status result |
DEM | 0x0083 | write | [compat] mode register: enables 34x0 mode |
DEM | 0x0093 | write | [compat] Increment channel1 low |
DEM | 0x009b | write | [compat] Increment channel1 high |
DEM | 0x00a3 | write | [compat] Increment channel2 low |
DEM | 0x00ab | write | [compat] Increment channel2 high |
DEM | 0x00bb | write | [compat] ad_cv |
DEM | 0x0200 | read | status |
DEM | 0x021f | read | [compat] internal use |
DEM | 0x021e | read | [compat] internal use |
DSP addresses
| address | r/w | description |
DSP | 0x0000 | write | volume/mode loudspeaker |
DSP | 0x0001 | write | balance/mode loudspeaker |
DSP | 0x0002 | write | bass loudspeaker |
DSP | 0x0003 | write | trebble loudspeaker |
DSP | 0x0004 | write | loudness loudspeaker |
DSP | 0x0005 | write | spatial/mode loudspeaker |
DSP | 0x0006 | write | volume/mode headphone |
DSP | 0x0007 | write | volume scart-1 output |
DSP | 0x0008 | write | loudspeaker source(fm/am,nicam.scart,i2s1,i2s2) +ch-matrix(a,b,stereo,mono) |
DSP | 0x0009 | write | headphone source+ch-matrix |
DSP | 0x000a | write | start1 source+ch-matrix |
DSP | 0x000b | write | i2s source+ch-matrix |
DSP | 0x000c | write | peak-detector source+ch-matrix |
DSP | 0x000d | write | prescale scart input |
DSP | 0x000e | write | prescale fm/am, fm-matrix |
DSP | 0x000f | write | [compat] fm fixed deemphasis |
DSP | 0x0010 | write | prescale nicam |
DSP | 0x0012 | write | prescale i2s2 |
DSP | 0x0013 | write | scart switches |
DSP | 0x0014 | write | beeper |
DSP | 0x0015 | write | [compat] identification mode |
DSP | 0x0016 | write | prescale i2s1 |
DSP | 0x0017 | write | [compat] fm dc notch |
DSP | 0x0018 | read | [compat] stereo detection register |
DSP | 0x0019 | read | peak readout left |
DSP | 0x001a | read | peak readout right |
DSP | 0x001b | read | [compat] dc level readout L |
DSP | 0x001c | read | [compat] dc level readout R |
DSP | 0x001e | read | hardware version |
DSP | 0x001f | read | product code/rom version |
DSP | 0x0020 | write | mode tone control(bass/treblle, equalizer) |
DSP | 0x0021 | write | equalizer loudspeaker band 1 |
DSP | 0x0022 | write | equalizer loudspeaker band 2 |
DSP | 0x0023 | write | equalizer loudspeaker band 3 |
DSP | 0x0024 | write | equalizer loudspeaker band 4 |
DSP | 0x0025 | write | equalizer loudspeaker band 5 |
DSP | 0x0029 | write | automatic volume correction |
DSP | 0x002c | write | subwoofer level adjust |
DSP | 0x002d | write | subwoofer corner freq/highpass |
DSP | 0x0030 | write | balance headphone |
DSP | 0x0031 | write | bass headphone |
DSP | 0x0032 | write | trebble headphone |
DSP | 0x0033 | write | loudness headphone |
DSP | 0x0040 | write | volume scart2 channel |
DSP | 0x0041 | write | scart2 source/ch-matrix |
DSP | 0x0048 | write | virtual surround switch |
DSP | 0x0049 | write | virtual surround spatial effect |
DSP | 0x004a | write | virtual surround 3D effect |
DSP | 0x004b | write | virtual surround mode |
DSP | 0x004d | write | noise generator |
mux
Datasheet found on the philips semi site
U2: 4052BT (a0/a1 = gpio00/gpio01)
0 : source = audio-in
1 : source = U4
2 : source = mono, FE21
3 : mute
video processor
Datasheet here
U3:
conexant
fusion 878a
25878-13
cc1478.5
0012 KOREA
special io pins are connected as follows:
pin | connected to |
gpio00 | U2.10 4052.A0 |
gpio01 | U2.9 4052.A1 |
gpio02 | ST1.10 |
gpio03 | U2.6 4052.E (0:enable sound, 1:muted) |
gpio04 | ? |
gpio05 | ? |
gpio06 | ST1.14 |
gpio07 | ST1.16 |
gpio08 | ST1.09 |
gpio09 | ST1.07 |
gpio10 | '0' |
gpio11 | '0' |
gpio12 | '0' |
gpio13 | '1' |
gpio14 | '0' = ST1.26 |
gpio15 | '0' = ST1.24 |
gpio16 | U4.9 4052.A1 = ST1.22 |
gpio17 | U4.10 4052.A0 = ST1.20 |
gpio18 | ST1.18 |
gpio19 | ST1.11 |
gpio20 | ST1.13 |
gpio21 | ? |
gpio22 | ? |
gpio23 | ? |
mux
U4: 4052BT (a0/a1 = gpio17/16)
0 : source = stereo, U1.spkrout
1 : source = stereo FE16,FE17 (fm l+r)
2 : source = stereo, U1.spkrout
3 : source = stereo, U1.spkrout
eeprom
Datasheet found on xicor
U5: C08/0406W - eeprom
opamp
Datasheet found on philips semi
U8: TDA1308
crystals
Q2: 18.432000 Mhz
Q1: 28.636363 Mhz
i2c bus
------------------------------
i2c ids:
0xa0 - 0xa7 : answer 0xff - 'HAUPEE' : EEPROM
0xc2 : answers 0xe2 - fe 4009 fr5 tuner chip
0xc3 : answers 0x62
general i2c addresses:
address | description |
0x00 | general call, second byte:
code | description |
0x06 | reset all |
0x02 | reset specific slave |
0x04 | reset to default address |
0x00 | invalid |
.......1 | |
|
0x01 | start byte
acknowledge not allowed
|
0x02/0x03 | change bus
temporarily halt i2c traffic |
0x04-0x0f | reserved |
0xf8-0xff | extended i2c addressing
bit2,1 + following byte = address
|
msp34x1g : i2c adres = 80/84/88 + 81/85/89
test connector
test pin | description |
ST1.01 | +5V |
ST1.02 | U4.ZB |
ST1.03 | +12V |
ST1.04 | U4.ZA |
ST1.05 | GND |
ST1.06 | I2C SDA |
ST1.07 | gpio09 |
ST1.08 | I2C SCL |
ST1.09 | gpio08 |
ST1.10 | gpio02 |
ST1.11 | gpio19 |
ST1.12 | ? |
ST1.13 | gpio20 |
ST1.14 | gpio06 |
ST1.15 | RESET |
ST1.16 | gpio07 |
ST1.17 | GND |
ST1.18 | gpio18 |
ST1.19 | GND |
ST1.20 | gpio17 = U4.A0 |
ST1.21 | internal TV out |
ST1.22 | gpio16 = U4.A1 |
ST1.23 | FE21 (sound output, fm mux) |
ST1.24 | gpio15 = '0' |
ST1.25 | ? |
ST1.26 | gpio14 = '0' |
how the mux chips are connected
01 | 0 | 1 | 2 | 3 | 17/16 |
0 | achter | achter | achter | achter | 'audio-in' |
1 | achter | stereo | achter | achter | 'U4' |
2 | sound | sound | sound | sound | 'mono' |
3 | voor | voor | voor | voor | 'mute' |
| | FM L+R | | | |
- stereo = in iedergeval bij radio.
- voor = voorgrond 'flopflop' geluid
- achter = achtergrond 'flopflop' geluid
- zachter = sound, maar iets zachter
U2.Y0B - C7 - R62 - audio-in(left)
U2.Y1B - C90 - U4.ZB, ST1.26
U2.Y2B - C89 * {r34 - FE21},r47 -GND
U2.Y3B - GND
U2.ZB - R58 - {C83-GND} - U8.6 - C54 {R28-GND} - R9 - audio out(left)
U2.Y0A - C86 - R61 - audio-in (right)
U2.Y1A - C88 - U4.ZA , ST1.25
U2.Y2A - C87 * {r34 - FE21},r47 -GND
U2.Y3A - GND
U2.ZA - R33 - {C82-GND} - U8.3 - C80 - {R27-GND} - R10 - audioout(right)
U4.Y0B - C100 - U1.56(spkrleft)
U4.Y1B = U3.Y3B
U4.Y2B - C103 - FE17
U4.Y3B - C131 - U1.56(spkrleft)
U4.ZB - C90 - U2.Y1B
U4.Y0A - C94 - U1.57(spkrright)
U4.Y1A = Y4.Y3A
U4.Y2A - C101 - FE16
U4.Y3A - C130 - U1.57(spkrright)
U4.ZA - c88 - U2.Y1A
U1.9 = FE09 = U3.91 SCL I2C-clock
U1.8 = FE10 = U3.90 SDA I2C-data
U1.25 (msp.IF1) - C2 - (R2-GND) - C127,C103 - FE18
U1.61 (msp.reset) - pci.reset
U1.12 (msp.adr_sel) - gnd
U1.22 (msp.testen) - gnd
U1.19 (msp.tp) - empty
U1.11 (msp.standby) - c122 - gnd - c11 - vpp